TCI6636K2H Datasheet, PDF (254/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
8.2.3.19 Device Speed (DEVSPEED) Register
The Device Speed Register shows the device speed grade and is shown below.
Figure 8-30 Device Speed Register (DEVSPEED)
31
28 27
16 15
12 11
0
Reserved
DEVSPEED
Reserved
ARMSPEED
R-n
R-n
Legend: R = Read only; -n = value after reset
Table 8-48 Device Speed Register Field Descriptions
Bit Field
Description
31-28 Reserved Reserved. Read only
27-16 DEVSPEED
Indicates the speed of the device (read only)
0b0000 0000 0000 = 800 MHz
0b0000 0000 0001 = 1000 MHz
0b0000 0000 001x = 1200 MHz
0b0000 0000 01xx = Reserved
0b0000 0000 1xxx = Reserved
0b0000 0001 xxxx = Reserved
0b0000 001x xxxx = Reserved
0b0000 01xx xxxx = Reserved
0b0000 1xxx xxxx = 1200 MHz
0b0001 xxxx xxxx= 1000 MHz
0b001x xxxx xxxx = 800 MHz
15-12 Reserved Reserved. Read only
11-0 ARMSPEED
End of Table 8-48
Indicates the speed of the ARM (read only)
0b0000 0000 0000 = 800 MHz
0b0000 0000 0001 = 1000 MHz
0b0000 0000 001x = 1200 MHz
0b0000 0000 01xx = 1350 MHz ⁽¹⁾
0b0000 0000 1xxx = 1400 MHz ⁽¹⁾
0b0000 0001 xxxx = Reserved
0b0000 001x xxxx = 1400 MHz ⁽¹⁾
0b0000 01xx xxxx = 1350.8 MHz ⁽¹⁾
0b0000 1xxx xxxx = 1200 MHz
0b0001 xxxx xxxx= 1000 MHz
0b001x xxxx xxxx = 800 MHz
1 Possible future support
254 Device Boot and Configuration
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