TCI6636K2H Datasheet, PDF (187/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
7.2 Switch Fabric Connections Matrix - Data Space
The figures below show the connections between masters and slaves through various sections of the TeraNet.
Figure 7-1 TeraNet 3_A-1
Bridge_1
Bridge_2
Bridge_3
From TeraNet_3_C
BCP
Packet DMA
M
SRIO
Packet DMA
M
QM
Packet DMA
M
QM_2
Packet DMA
M
FFTC_0
Packet DMA
M
FFTC_1
Packet DMA
M
FFTC_2
Packet DMA
M
FFTC_3
Packet DMA
M
Debug_SS _M
BCP_DIO0 _M
TAC_FE2 _M
TAC_FE3 _M
TAC_FE _M
BCP_DIO1 _M
USB_MST _M
TNet_3_D
CPU/3
TNet_3_F
CPU/3
TNet_3_G
CPU/3
Bridge_11
6636
Tracer_SPI_
ROM_EMIF16
TNet_6P_A
CPU/6
MPU_8
MPU_12
MPU_13
MPU_14
TNet_3_H
CPU/3
S ^EMIF16
S ^SPI_0
S
SPI_1
S ^SPI_2
S ^Boot_ROM
S
Boot_ROM
ARM
S ^VCP2_0
S ^VCP2_1
S ^VCP2_2
S ^VCP2_3
To TeraNet_3_C
To TeraNet_3P_A
Bridge_5
Bridge_6
Bridge_7
Bridge_8
Bridge_9
Bridge_10
Bridge_12
Bridge_13
Bridge_14
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System Interconnect 187