SH7710 Datasheet, PDF (981/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Item
18.3.36 Added Qtag Value Set
Register (Port 0 to 1)
(TSU_ADQT0)
Page Revision (See Manual for Details)
679 Bit
12
Bit Name
R/W

R
18.3.37 Added Qtag Value Set
Register (Port 1 to 0)
(TSU_ADQT1)
680 Bit
12
Bit Name
R/W

R
18.4.4 CAM Function
18.5 Connection to LSI
Figure 18.13 Example of
Connection to DP83847
712
725
The internal CAM entry table has 32 entries and 32
POST tables, and the POST table can be specified in
each entry. The external connection CAM logic
configuration is based on pins because POST tables
(total of 2) are allocated to the CAMSEN0 and
CAMSEN1 pins.
Figure 18.13 shows the example of connection to a
DP83847 (National Semiconductor Corporation).
MII (Media Independent Interface)
This LSI
DP83847
TX-ER
ETXD3
ETXD2
ETXD1
ETXD0
TX-EN
TX-CLK
MDC
MDIO
ERXD3
ERXD2
ERXD1
ERXD0
RX-CLK
CRS
COL
RX-DV
RX-ER
TX_ER
TXD[3]
TXD[2]
TXD[1]
TXD[0]
TX_EN
TX_CLK
MDC
MDIO
RXD[3]
RXD[2]
RXD[1]
RXD[0]
RX_CLK
CRS
COL
RX_DV
RX_ER
Figure 18.14 Example of
726
Connection to DP83846AVHG
Section 19 Ethernet Controller 727
Direct Memory Access Controller
(E-DMAC)
19.1 Features
Deleted
Deleted
• Improves software handling capability by padding in
receive data
Rev. 2.00 Dec. 07, 2005 Page 939 of 950
REJ09B0079-0200