SH7710 Datasheet, PDF (754/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
Furthermore, with the EtherC, the evaluation of receive and relay of unicast to other destinations
and multicast frames by using CAM are performed by referencing the registered MAC addresses
of the CAM entry table in the EtherC and the CAM logic connected externally via the CAMSEN0
and CAMSEN1 pins. By using this function, receive FIFO overflow can be prevented caused by
accumulation of frame data not required for reception, and CPU processing for determining
receive can be reduced.
The POST table is composed of 4 bits, and each bit corresponds to port 0 reception, port 1
reception, port 0 to 1 relay, and port 1 to 0 relay. When the corresponding bit is set to 1, the CAM
evaluation results are used for determining receive and relay. In other words, when the
corresponding bit of the POST table is cleared to 0, receive and relay evaluation will be the same
as when CAM is not used shown in table 18.2. The difference between the on-chip CAM entry
table and externally connected CAM logic lies in how the POST table is set. In the internal CAM
entry table, there are 32 POST tables (same as the number of entries) and the POST table can be
set for each entry. The internal CAM entry table has 32 entries and 32 POST tables, and the POST
table can be specified in each entry. The external connection CAM logic configuration is based on
pins because POST tables (total of 2) are allocated to the CAMSEN0 and CAMSEN1 pins.
When On-Chip CAM Entry Table is Used: The on-chip CAM has entry tables which can
register the MAC address of 32 entries, the details of which can be set by TSU_ADRH0 to
TSU_ADRH31 and TSU_ADRL0 to TSU_ADRL31. The setting to enable/disable referencing of
the on-chip CAM entry table is carried out by the CAM entry table enable setting register which
sets whether to perform CAM evaluation or not, and the CAM entry table POST setting register
for setting whether to use the CAM determination results for determining receive or relay. When
on-chip CAM entry table referencing during receive is enabled, the destination address in the
frame and MAC address registered in the CAM entry table are compared, and it is determined
whether to transfer the frames input to the MAC to E-DMAC (have E-DMAC receive the frames)
or discard the frames. When relaying and CAM entry table referencing during relay are both
enabled, whether to transfer or discard multicast frames and frames for destinations other than this
LSI can be determined by comparing the destination address in the frame and MAC address
registered in the CAM entry table. Table 18.3 shows the processing method of frames (receive or
discard) in MAC0 to E-DMAC0 and MAC1 to E-DMAC1 reception, while table 18.4 shows the
processing for frames in MAC0 to MAC1 and MAC1 to MAC0 relay (relay or discard).
Rev. 2.00 Dec. 07, 2005 Page 712 of 950
REJ09B0079-0200