SH7710 Datasheet, PDF (711/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
18.3.31 Relay Function Set Register (Common) (TSU_FWSLC)
When the CAM is used, the referred area in the CAM entry table (partially or wholly) can be
specified by the TSU_POST1 to TSU_POST4 registers. When the CAM is installed outside this
LSI, the evaluation results of the external CAM can be referred by input on the CAMSEN0 and
CAMSEN1 pins. (For details, refer to section 18.4.4, CAM Function.) TSU_FWSLC enables
settings by the TSU_POST1 to TSU_POST4 registers and conditions for referring signals on the
CAMSEN0 and CAMSEN1 pins. Writing to this register is prohibited, after relay operations have
been enabled once (after the FWEN0 in TSU_FWEN0 or the FWEN1 in TSU_FWEN1 is set to
1).
Bit
Bit Name
31 to 14 
Initial
Value
All 0
13
POSTENU 0
12
POSTENL 0
11 to 8 
All 0
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W Enables the settings of the POST field of CAM entry
tables 0 to 15 (settings by the TSU_POST1 and
TSU_POST2 registers).
0: Disables the settings of the POST field. (The CAM
entry table is referred only in port 0 reception.)
1: Enables the settings of the POST field. (The CAM
entry table reference conditions follow the POST
field settings.)
R/W Enables the settings of the POST field of CAM entry
tables 16 to 31 (settings by the TSU_POST3 and
TSU_POST4 registers).
0: Disables the settings of the POST field. (The CAM
entry table is referred only in port 1 reception.)
1: Enables the settings of the POST field. (The CAM
entry table reference conditions follow the POST
field settings.)
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 2.00 Dec. 07, 2005 Page 669 of 950
REJ09B0079-0200