SH7710 Datasheet, PDF (390/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 12 Bus State Controller (BSC)
Initial
Bit
Bit Name Value R/W Description
15
TYPE3 0
R/W Memory Type
14
TYPE2 0
R/W Specify the type of memory connected to a space.
13
TYPE1 0
R/W 0000: Normal space
12
TYPE0 0
R/W 0001: Burst ROM (clock asynchronous)
0010: Reserved (setting prohibited)
0011: Byte-selection SRAM
0100: SDRAM
0101: PCMCIA
0110: Reserved (setting prohibited)
0111: Burst ROM (clock synchronous)*²
1000: Reserved (setting prohibited)
1001: Reserved (setting prohibited)
1010: Reserved (setting prohibited)
1011: Reserved (setting prohibited)
1100: Reserved (setting prohibited)
1101: Reserved (setting prohibited)
1110: Reserved (setting prohibited)
1111: Reserved (setting prohibited)
Note: Memory type for area 0 immediately after reset is
normal space. The normal space, burst ROM (clock
asynchronous), or burst ROM (clock synchronous)
can be selected by these bits.
For details on memory type in each area, see tables 12.2
and 12.3.
11

0
R
Reserved
This bit is always read as 0. The write value should always
be 0.
Rev. 2.00 Dec. 07, 2005 Page 348 of 950
REJ09B0079-0200