SH7710 Datasheet, PDF (139/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
3.4.1 General Registers
The DSP instructions 10 general registers in the 16 general registers as address pointers or index
registers for double data transfers and single data transfers. In the following descriptions, another
register function in the DSP instructions is also indicated within parentheses [ ].
• Double data transfer instructions (X memory and Y memory are accessed simultaneously)
In double data transfers, X memory Y memory can be accessed simultaneously. To specify X
and Y memory addresses, two address pointers are supported.
X memory (MOVX.W)
Y memory (MOVY.W)
Address Pointer
R4, R5[Ax]
R6, R7[Ay]
Index Register
R8 [Ix]
R9 [Iy]
• Single data transfer instructions
In single data transfer, any logical address space can be accessed via the L bus. The following
address pointers and index registers are used.
Any logical space (MOVS.W/L)
Address Pointer
R4, R5, R2, R3[As]
Index Register
R8 [Is]
31
R0
0
General registers (DSP mode)
R1
R2 [As2]
R3 [As3]
R4 [As0]
X and Y double data transfers:
R4, 5
R8
[Ax] : Address register set for the for X data memory
[Ix] : Index regiser for X address register set Ax
R5 [As1, Ax1]
R6 [Ay0]
R7 [Ay1]
R6, 7
R9
[Ay] : Address register set for the for Y data memory
[Iy] : Index regiser for Y address register set Ay
R8 [Ix, Is]
R9 [Iy]
Single data transfer s:
R10
R4, 5, 2, 3 [As] : Address register set for all data memories
R11
R8
[Is] : Index regiser used for single data transfers
R12
R13
R14
R15
Figure 3.5 General Registers (DSP Mode)
Rev. 2.00 Dec. 07, 2005 Page 97 of 950
REJ09B0079-0200