SH7710 Datasheet, PDF (726/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
Initial
Bit
Bit Name Value R/W Description
16
TEN15 0
R/W CAM Entry Table 15 (TSU_ADRH10 and TSU_ADRL15)
Setting
0: Disabled
1: Enabled
15
TEN16 0
R/W CAM Entry Table 16 (TSU_ADRH16 and TSU_ADRL16)
Setting
0: Disabled
1: Enabled
14
TEN17 0
R/W CAM Entry Table 17 (TSU_ADRH17 and TSU_ADRL17)
Setting
0: Disabled
1: Enabled
13
TEN18 0
R/W CAM Entry Table 18 (TSU_ADRH18 and TSU_ADRL18)
Setting
0: Disabled
1: Enabled
12
TEN19 0
R/W CAM Entry Table 19 (TSU_ADRH19 and TSU_ADRL19)
Setting
0: Disabled
1: Enabled
11
TEN20 0
R/W CAM Entry Table 20 (TSU_ADRH20 and TSU_ADRL20)
Setting
0: Disabled
1: Enabled
10
TEN21 0
R/W CAM Entry Table 21 (TSU_ADRH21 and TSU_ADRL21)
Setting
0: Disabled
1: Enabled
9
TEN22 0
R/W CAM Entry Table 22 (TSU_ADRH22 and TSU_ADRL22)
Setting
0: Disabled
1: Enabled
Rev. 2.00 Dec. 07, 2005 Page 684 of 950
REJ09B0079-0200