SH7710 Datasheet, PDF (603/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
16.4.2 Serial Operation in Asynchronous Mode
In asynchronous mode, each transmitted or received character begins with a start bit and ends with
a stop bit. Serial communication is synchronized one character at a time. Figure 16.2 shows the
general format of asynchronous serial communication.
In asynchronous serial communication, the communication line is normally held in the mark
(high) state. The SCIF monitors the line and starts serial communication when the line goes to the
space (low) state, indicating a start bit. One serial communication character consists of a start bit
(low), data (LSB first), parity bit (high/low), and stop bit (high), in this order. In asynchronous
mode, the SCIF synchronizes at the falling edge of the start bit during reception. The SCIF
samples each data bit on the eighth pulse of a clock with a frequency 16 times the bit rate.
Therefore, communication data is latched at the center of each bit.
Idle state (mark state)
1
1
Serial
data
0
D0 D1 D2 D3 D4 D5 D6 D7 0/1
1
1
Start
bit
1 bit
Transmit/Receive data
7 bits or 8 bits
Parity
bit
1 bit or
no bit
Stop bit
1 bit or
2 bits
One unit of communication data (character or frame)
Figure 16.2 Data Format in Asynchronous Communication
(Example of 8-Bit Data with Parity and 2 Stop Bits)
Rev. 2.00 Dec. 07, 2005 Page 561 of 950
REJ09B0079-0200