SH7710 Datasheet, PDF (557/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 15 Realtime Clock (RTC)
RMINAR is an 8-bit readable/writable register. The ENB bit in RMINAR is initialized by a
power-on reset. The remaining RMINAR fields are not initialized by a power-on reset or manual
reset, or in standby mode.
Bit
7
6 to 4
3 to 0
Bit Name
ENB
Initial Value R/W
0
R/W


R/W


R/W
Description
Minute Alarm Enable
Specifies whether comparison of RMINCNT and
RMINAR is performed as an alarm condition.
0: Not compared
1: Compared
Setting value for 10-unit of minute alarm in the
BCD-code.
The range can be set from 0 to 5 (decimal).
Setting value for 1-unit of minute alarm in the
BCD-code.
The range can be set from 0 to 9 (decimal).
15.3.11 Hour Alarm Register (RHRAR)
RHRAR is an alarm register corresponding to the hour counter RHRCNT of the RTC. When the
ENB bit is set to 1, a comparison with the RHRCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR, the counter and alarm register
comparison is performed only on those with ENB bits and the YAEN bit in RCR3 set to 1, and if
each of those coincide, an RTC alarm interrupt is generated.
The range of hour alarm which can be set is 0 to 23 (decimal). Errant operation will result if any
other value is set.
RHRAR is an 8-bit readable/writable register. The ENB bit in RHRAR is initialized by a power-
on reset. The remaining RHRAR fields are not initialized by a power-on reset or manual reset, or
in standby mode.
Rev. 2.00 Dec. 07, 2005 Page 515 of 950
REJ09B0079-0200