SH7710 Datasheet, PDF (602/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Table 16.3 SCSMR Settings for Serial Transfer Format Selection
SCSMR Settings
Bit 7: Bit 6: Bit 5: Bit 3:
C/A ^{CHR PE STOP}
00
0
0
1
1
0
1
1
0
0
1
1
0
1
1*
*
*
Mode
Asynchronous mode
Clock synchronous mode
The SCIF Transfer Format
Parity
Data Length ^Bit
Stop Bit
Length
8-bit data No
1 bit
2 bits
Yes
1 bit
2 bits
7-bit data No
1 bit
2 bits
Yes
1 bit
2 bits
8-bit data No
No
Table 16.4 SCSMR and SCSCR Settings for the SCIF Clock Source Selection
SCSMR
SCSCR
Bit 1:
Bit 7: C/A CKE1
0
0
Bit 0:
CKE0
0
1
1
0
1
1
0
0
1
1
0
1
Mode
Clock
Source
Asynchronous Internal
mode
External
SCIFnCK Pin Function
SCIF does not use the SCIFnCK pin
Outputs a clock with frequency 16
times the bit rate
Inputs a clock with frequency 16 times
the bit rate
Clock
synchronous
mode
Internal
External
Outputs the synchronous clock
Inputs the synchronous clock
Rev. 2.00 Dec. 07, 2005 Page 560 of 950
REJ09B0079-0200