SH7710 Datasheet, PDF (714/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
18.3.33 Qtag Addition/Deletion Set Register (Port 1 to 0) (TSU_QTAGM1)
TSU_QTAGM1 sets the functions adding Qtag from the normal Ethernet frames (no Qtag) to
IEEE802.1Q frames (with Qtag) and deleting Qtags from IEEE802.1Q frames (with Qtag) to
normal Ethernet frames (no Qtag) during port 1 to 0 relay operations. Writing to this register is
prohibited, after relay operations have been enabled once (after the FWEN0 in TSU_FWEN0 or
the FWEN1 in TSU_FWEN1 is set to 1).
Bit
Bit Name
31 to 2 
Initial
Value
All 0
1, 0 QTAGM11, All 0
QTAGM10
R/W Description
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W These bits set Qtag adding and deleting functions during
port 1 to 0 relay operations.
H′0: No Qtag adding and deleting functions
H′1: No Qtag adding and deleting functions (same as
H′0)
H′2: Deletes Qtag from frames with Qtag
H′3: Adds Qtag to frames with no Qtag
Writing to this register is prohibited, after transfer
operations have been enabled once (after the FWEN0 in
TSU_FWEN0 or the FWEN1 in TSU_FWEN1 is set to
1).
Rev. 2.00 Dec. 07, 2005 Page 672 of 950
REJ09B0079-0200