SH7710 Datasheet, PDF (958/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 25 Electrical Characteristics
25.4 Delay Time Variation Due to Load Capacitance
A graph (reference data) of the variation in delay time when a load capacitance greater than that
stipulated (30 pF) is connected to this LSI’s pins is shown below. The graph shown in figure 25.76
should be taken into consideration in the design process if the stipulated capacitance is exceeded
in connecting an external device.
If the connected load capacitance exceeds the range shown in figure 25.76, the graph will not be a
straight line.
+4.0 ns
+3.0 ns
+2.0 ns
+1.0 ns
+0.0 ns
+0 pF
+25 pF
Load Capacitance [pF]
+50 pF
Figure 25.76 Load Capacitance vs. Delay Time
Rev. 2.00 Dec. 07, 2005 Page 916 of 950
REJ09B0079-0200