SH7710 Datasheet, PDF (852/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 24 List of Registers
24.1 Register Addresses
(by functional module, in order of the corresponding section
numbers)
Entries under Access Size indicates number of bits.
Note: Access to undefined or reserved addresses is prohibited. Since operation or continued
operation is not guaranteed when these registers are accessed, do not attempt such access.
Abbreviation
INTEVT
INTEVT2
TRA
EXPEVT
TEA
MMUCR
PTEH
PTEL
TTB
CCR1
CCR2
CCR3
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
IPRI
ICR0
ICR1
Module*¹
Exception
handling
MMU
Cache
INTC
Bus*²
L
L
L
L
L
L
L
L
L
L
L
L
P
P
P
P
P
P
P
P
P
P
P
Address
H'FFFF FFD8
H'A400 0000
H'FFFF FFD0
H'FFFF FFD4
H'FFFF FFFC
H'FFFF FFE0
H'FFFF FFF0
H'FFFF FFF4
H'FFFF FFF8
H'FFFF FFEC
H'A400 00B0
H'A400 00B4
H'A414 FEE2
H'A414 FEE4
H'A414 0016
H'A414 0018
H'A414 001A
H'A408 0000
H'A408 0002
H'A408 0004
H'A408 0006
H'A414 FEE0
H'A414 0010
Access Size
Size (bit) (bit)*³
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Rev. 2.00 Dec. 07, 2005 Page 810 of 950
REJ09B0079-0200