SH7710 Datasheet, PDF (217/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 4 Exception Handling
• Example 4: Repeat loop consisting of one instruction
LDRS
RptDtct + 8 ; [A]
LDRS
RptDtct + 4 ; [A]
SETRC #4
; [A]
RptDtct: RptDtct
; [B] A repeat detection
instruction is an
instruction prior to a
repeat start instruction
RptStart:
RptEnd: RptDtct1
; [C1][Repeat start
instruction]== [Repeat end
instruction]
InstrNext
; [A]
Rev. 2.00 Dec. 07, 2005 Page 175 of 950
REJ09B0079-0200