SH7710 Datasheet, PDF (743/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
18.3.49 Receive Frame Counter Register (Port 0) (Normal and Error Reception)
(RXALCR0)
RXALCR0 is a 32-bit counter indicating the number of frames successfully received and frames
received with error in MAC-0. When the value in this register reaches H'FFFFFFFF, the count is
halted. The counter value is cleared to 0 by a read to this register. This register cannot be written.
Initial
Bit
Bit Name Value
31 to 0 RC031 to All 0
RC000
R/W Description
R
Port 0 Receive Frame Counter Bit
These bits indicate the number of frames successfully
received and frames received with error.
18.3.50 Relay Frame Counter Register (Port 1 to 0) (Normal Relay Only) (FWNLCR0)
FWNLCR0 is a 32-bit counter indicating the number of frames successfully relayed in port 1 to 0
relay operations. When the value in this register reaches H'FFFFFFFF, the count is halted. The
counter value is cleared to 0 by a read to this register. This register cannot be written.
Initial
Bit
Bit Name Value
31 to 0 NFC031 to All 0
NFC000
R/W Description
R
Port 1 to 0 Relay Frame Counter Bit
These bits indicate the number of frames successfully
relayed.
Rev. 2.00 Dec. 07, 2005 Page 701 of 950
REJ09B0079-0200