SH7710 Datasheet, PDF (737/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
18.3.43 CAM Entry Table POST4 Register (TSU_POST4)
When using the CAM, the conditions for referring to each CAM entry table can be specified by
using the TSU_POST1 to TSU_POST4 registers. TSU_POST4 specifies the conditions for
referring to TSU_ADRH24 to TSU_ADRH31 and TSU_ADRL24 to TSU_ADRL31. The settings
of this register are valid when the POSENU bit in TSU_FWSLC is set to 1.
Initial
Bit
Bit Name Value R/W Description
31 to 28 POST243 to All 0
POST240
R/W These bits set the conditions for referring to the CAM
entry table 24. By setting multiple bits to 1, multiple
conditions can be selected.
POST243: The CAM entry table 24 is referred in port 0
reception.
POST242: The CAM entry table 24 is referred in port 0
to 1 relay.
POST241: The CAM entry table 24 is referred in port 1
reception.
POST240: The CAM entry table 24 is referred in port 1
to 0 relay.
27 to 24 POST253 to All 0
POST250
R/W These bits set the conditions for referring to the CAM
entry table 25. By setting multiple bits to 1, multiple
conditions can be selected.
POST253: The CAM entry table 25 is referred in port 0
reception.
POST252: The CAM entry table 25 is referred in port 0
to 1 relay.
POST251: The CAM entry table 25 is referred in port 1
reception.
POST250: The CAM entry table 25 is referred in port 1
to 0 relay.
Rev. 2.00 Dec. 07, 2005 Page 695 of 950
REJ09B0079-0200