SH7710 Datasheet, PDF (680/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
E-DMAC0
EtherC
TSU
CAM control
Address storage register
(32 entries × 48 bits)
E-DMAC1
TSU FIFO control
TSU FIFO (0 to 1)
TSU FIFO (1 to 0)
MAC-0
(port 0)
Receive
controller
Command status
interface
Transmit
controller
MAC-1
(port 1)
Receive
controller
Command status
interface
Transmit
controller
MII
MII
PHY-0
PHY-1
Figure 18.1 Configuration of EtherC
Rev. 2.00 Dec. 07, 2005 Page 638 of 950
REJ09B0079-0200