SH7710 Datasheet, PDF (748/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
18.4 Operation
The following outlines the operations of the Ethernet controller (EtherC).
Automatic Ethernet Frame Transfer Function by Hardware: Each MAC controller can
transmit and receive independently using two ports of MAC controllers. Furthermore, relay
between the two MAC controllers can be performed by hardware using the on-chip TSU of the
EtherC. TSU selects one of the following processes depending on the MAC address of the
destination of the Ethernet frame input to the MAC controller according to on the settings of the
CAM and registers TSU_FWSL0/1, and TSU_FWSLC; 1) reception, 2) relay, 3) reception and
relay, and 4) discard. This setting can be performed independently for each port at the receive and
relay sides by means of registers TSU_TEN and TSU_POST1 to TSU_POST4. It also has a 6-
kbyte TSU FIFO for temporarily retaining the frames relayed. This TSU FIFO can vary capacity
allotment with port 0 to 1 transfer and port 1 to 0 transfer using the TSU FIFO size select register
(TSU_FCM).
TSU FIFO Overflow Prevention Function: By supporting relay operations, the MAC controller
needs to transmit relay frames other than transmit frames requested by the E-DMAC normally.
Arbitration is carried out between these two frames. The procedure of arbitration is specified by
registers TSU_PRISL0 and TSU_PRISL1. It has a function which relays frames of the TSU FIFO
with priority when the using rate of the TSU FIFO exceeds the value set by registers
TSU_PRISL0 and TSU_PRISL1, thus preventing frame losses by TSU FIFO overflow.
QoS (IEEE802.1Q) Frame Transmit/Receive, Relay Function: QoS frames can be transmitted
and received. At the using relay function, if the Ethernet device connected to one of the MAC
controllers cannot transmit/receive QoS frames, this LSI can convert to the normal IEEE802.3
frames and relay it.
Figure 18.2 shows the data path and outline of various settings.
Rev. 2.00 Dec. 07, 2005 Page 706 of 950
REJ09B0079-0200