SH7710 Datasheet, PDF (706/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
Bit
7 to 0
Initial
Bit Name Value
PRISL07 to All 0
PRISL00
R/W Description
R/W Sets the threshold of the port 1 to 0 TSU FIFO
capacity in 64-byte units in the event switching to
relay priority when PRIMD02 to PRIMD00 are set to
H′4 or H′5.
H′00: 0 byte
H′01: 64 bytes
H′02: 128 bytes
:
:
H′5E: 6016 bytes
H′5F: 6080 bytes
Settings are disabled for H′60 to H′FF.
When set to H′00, relay always takes priority. When
the value set is above the port 1 to 0 TSU FIFO
capacity set by the FCM2 to FCM0 in TSU_FCM, if
the PRIMD02 to PRIMD00 are H′4, round robin will
always be set. If the PRIMD02 to PRIMD00 are H′5,
transmission always takes priority.
18.3.28 Transmit/Relay Priority Control Mode Register (Port 1) (TSU_PRISL1)
TSU_PRISL1 sets the priority control mode when the transmission request from the E-DMAC to
MAC-1 come into collision with port 0 to 1 relay operations. Writing to this register is prohibited,
after relay operations have been enabled once (after the FWEN0 in TSU_FWEN0 or the FWEN1
in TSU_FWEN1 is set to 1).
Bit
Bit Name
31 to 15 
Initial
Value
All 0
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 2.00 Dec. 07, 2005 Page 664 of 950
REJ09B0079-0200