SH7710 Datasheet, PDF (26/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 24 List of Registers............................................................................... 809
24.1 Register Addresses
(by functional module, in order of the corresponding section numbers) ........................... 810
24.2 Register Bits....................................................................................................................... 823
24.3 Register States in Each Operating Mode ........................................................................... 846
Section 25 Electrical Characteristics ................................................................. 855
25.1 Absolute Maximum Ratings .............................................................................................. 855
25.2 DC Characteristics ............................................................................................................. 857
25.3 AC Characteristics ............................................................................................................. 859
25.3.1 Clock Timing ........................................................................................................ 860
25.3.2 Control Signal Timing .......................................................................................... 865
25.3.3 AC Bus Timing..................................................................................................... 868
25.3.4 Basic Timing......................................................................................................... 870
25.3.5 Burst ROM Timing............................................................................................... 874
25.3.6 Synchronous DRAM Timing................................................................................ 875
25.3.7 DMAC Signal Timing .......................................................................................... 901
25.3.8 RTC Signal Timing............................................................................................... 902
25.3.9 SCIF Module Signal Timing................................................................................. 903
25.3.10 SIOF Module Signal Timing ................................................................................ 904
25.3.11 Ethernet Controller Timing................................................................................... 908
25.3.12 Port Input/Output Timing ..................................................................................... 912
25.3.13 H-UDI Related Pin Timing................................................................................... 913
25.3.14 AC Characteristics Measurement Conditions ....................................................... 915
25.4 Delay Time Variation Due to Load Capacitance ............................................................... 916
Appendix ......................................................................................................... 917
A. Pin States and States of Unused Pins ................................................................................. 917
B. Package Dimensions .......................................................................................................... 925
Main Revisions and Additions in this Edition..................................................... 929
Index
......................................................................................................... 947
Rev. 2.00 Dec. 07, 2005 Page xxvi of xlii