SH7710 Datasheet, PDF (144/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
An example of the use of modulo addressing is shown below.
MOV.L #H’70047000,R10
;Specify MS=H’7000 ME = H’7004
LDC R10,MOD
;Specify ME:MS to MOD register
STC SR,R10
;
MOV.L #H’FFFFF3FF,R11 ;
MOV.L #H’00000400,R12 ;
AND R11,R10
;
OR R12,R10
;
LDC R10,SR
; Specify SR.DMX=1,
SR.DMY=0, and X modulo addressing mode
MOV.L #H’A5007000,R14
MOVX.W @R4+,X0
; R4: H’A5007000→ H’A5007002
MOVX.W @R4+,X0
; R4: H’A5007002→ H’A5007004
MOVX.W @R4+,X0
; R4: H’A5007004→ H’A5007000
(Matches to ME and MS is set)
MOVX.W @R4+,X0
; R4: H’A5007000→ H’A5007002
MOVX.W @R4+,X0
; R4: H’A5007000→ H’A5007002
The start and end addresses are specified in MS and ME, then the DMX or DMY bit is set to 1.
When the X or Y data transfer instruction specified by the DMX or DMY is executed, the address
register contents before updating are compared with ME^*, and if they match, start address MS is
stored in the address register as the value after updating.
When the addressing type of the X/Y data transfer instruction is no-update, the X/Y data transfer
instruction is not returned to MS even if they match ME.
When the addressing type of the X/Y data transfer instruction is addition index register addressing,
the address pointed way not match the address pointer ME and exceed it. In this case, the address
pointer value does not become the modulo start address.
The maximum modulo size is 64 kbytes. This is sufficient to access the X and Y data memory.
Note: * Not only with modulo addressing, but when X and Y data addressing is used, bit 0 is
ignored. 0 must always be written to bit 0 of the address pointer, index register, MS,
and ME.
Rev. 2.00 Dec. 07, 2005 Page 102 of 950
REJ09B0079-0200