SH7710 Datasheet, PDF (701/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Ethernet Controller (EtherC)
18.3.23 Relay Enable Register (Port 1 to 0) (TSU_FWEN1)
TSU_FWEN1 enables or disables relay operations from the MAC-1 to MAC-0 (writing to the
relay FIFO).
Initial
Bit
Bit Name Value
31
FWEN1 0
30 to 0 
All 0
R/W Description
R/W Port 1 to 0 Relay Operation Enable
0: Port 1 to 0 relay is disabled
1: Port 1 to 0 relay is enabled
When the value of the FCM2 to FCM0 in the TSU FIFO
size select register TSU_FCM is set to H′3, setting this
bit to 1 is prohibited.
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 2.00 Dec. 07, 2005 Page 659 of 950
REJ09B0079-0200