SH7710 Datasheet, PDF (340/996 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 10 Power-Down Modes
10.1.3 Input/Output Pins
Table 10.2 lists the pins used for the power-down modes.
Table 10.2 Pin Configuration
Pin Name
Symbol
I/O Description
Processing state 1 STATUS1 O Indicates the operating state of the processor.
Processing state 0 STATUS0
HH: Reset
HL: Sleep mode
LH: Standby mode
Power-on reset
RESETP I
LL: Normal operation
Inputting low level signal to this pin cause a transition
to power-on reset processing.
Manual reset
RESETM I
Inputting low level signal to this pin cause a transition
to manual reset processing.
Note: H and L indicate high and low levels, respectively. The STATUS1 and STATUS0 pins
indicate the pin status in this order.
10.2 Register Descriptions
The following registers are used for the power-down modes. Refer to section 24, List of Registers,
for the addresses and access size for these registers.
• Standby control register (STBCR)
• Standby control register 2 (STBCR2)
• Standby control register 3 (STBCR3)
10.2.1 Standby Control Register (STBCR)
STBCR is an 8-bit readable/writable register that specifies the state of the power-down mode. This
register is initialized to H′00 at power-on reset but retains the previous value after manual reset.
Rev. 2.00 Dec. 07, 2005 Page 298 of 950
REJ09B0079-0200