HD6417705F133V Datasheet, PDF (723/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

25.3.15 UDI Related Pin Timing
Table 25.17 UDI Related Pin Timing
(Conditions: VCCQ = VCC-RTC = VCC-USB = 3.0 to 3.6 V, VCC = VCC-PLL1 = VCC-PLL2 = 1.4 to
1.6 V, AVCC = 3.0 to 3.6 V, VSSQ = VSS = VSS-RTC = VSS-USB = VSS-PLL1 = VSS-PLL2 =
AVSS = 0 V, Ta = –20 to 75°C)
Item
Symbol
Min
Max
Unit Figure
TCK cycle time
tTCKcyc
50
—
ns
25.54,
25.56
TCK high-pulse width
tTCKH
12
—
ns
25.54
TCK low-pulse width
TCK rise/fall time
TRST setup time
TRST hold time
tTCKL
12
tTCKf
—
tTRSTS
12
tTRSTH
50
—
ns
4
ns
—
ns
25.55
—
tcyc
TDI setup time
tTDIS
10
—
ns
25.56
TDI hold time
tTDIH
10
—
ns
TMS setup time
tTMSS
10
—
ns
TMS hold time
tTMSH
10
—
ns
TDO delay time
ASEMD0 setup time
ASEMD0 hold time
tTDOD
—
tASEMD0S
12
tASEMD0H
12
15
ns
—
ns
25.57
—
ns
t_TCKcyc
t_TCKH
t_TCKL
1/2 V_CCQ
V_IH
V_IH
V_IL
V_IL
t_TCKf
V_IH
1/2 V_CCQ
t_TCKf
Figure 25.54 TCK Input Timing
Rev. 2.00, 09/03, page 675 of 690