HD6417705F133V Datasheet, PDF (402/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

15.3.1 64-Hz Counter (R64CNT)
The 64-Hz counter (R64CNT) is an 8-bit read-only register that indicates the state of the divider
circuit between 64 Hz and 1 Hz.
R64CNT is reset to H'00 by setting the RESET bit in RCR2 or the ADJ bit in RCR2 to 1.
R64CNT is not initialized by a power-on reset or manual reset, or in standby mode.
Bit
7
6 to 0
Bit Name

Initial Value R/W
0
R


R
Description
Reserved
This bit is always read as 0.
64-Hz Counter
Each bit (bits 6 to 0) indicates the state of the
RTC divider circuit between 64 Hz and 1 Hz.
Bit
Frequency
6:
1 Hz
5:
2 Hz
4:
4 Hz
3:
8 Hz
2:
16 Hz
1:
32 Hz
0:
64 Hz
15.3.2 Second Counter (RSECCNT)
The second counter (RSECCNT) is an 8-bit readable/writable register used for setting/counting in
the BCD-coded second section. The count operation is performed by a carry for each second of the
64-Hz counter.
The range of second that can be set is 00 to 59 (decimal). Errant operation will result if any other
value is set. Carry out write processing after stopping the count operation with the START bit in
RCR2.
RSECCNT is not initialized by a power-on reset or manual reset, or in standby mode.
Rev. 2.00, 09/03, page 354 of 690