HD6417705F133V Datasheet, PDF (299/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

• DMARS1
Bit
Initial
Bit
Name Value R/W
15 to 10 C3MID5 to 0
R/W
C3MID0
9
C3RID1 0
R/W
8
C3RID0 0
R/W
7 to 2 C2MID5 to 0
R/W
C2MID0
1
C2RID1 0
R/W
0
C2RID0 0
R/W
Description
Transfer request resource module ID5 to ID0 for DMA
channel 3 (MID)
See table 8.2.
Transfer request resource register ID1 and ID0 for DMA
channel 3 (RID)
See table 8.2.
Transfer request resource module ID5 to ID0 for DMA
channel 2 (MID)
See table 8.2.
Transfer request resource register ID1 and ID0 for DMA
channel 2 (RID)
See table 8.2.
Table 8.2 Transfer Request Sources
Peripheral Setting Value for One
Module
Channel (MID + RID)
MID
RID
SCIF0
H'21
B'001000 B'01
H'22
B'10
SCIF2
H'29
B'001010 B'01
H'2A
B'10
USB
H'73
B'011100 B'11
H'70
B'00
Function
Transmit
Receive
Transmit
Receive
Transmit
Receive
Rev. 2.00, 09/03, page 251 of 690