HD6417705F133V Datasheet, PDF (617/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Pin Name
Input/Output Description
ASEBRKAK
AUDSYNC
AUDATA3 to 0
AUDCK
Output
Dedicated emulator pin
Note: * The pull-up MOS turns on if the pin function controller (PFC) is used to select other
functions (UDI).
23.3 Register Descriptions
The UDI has the following registers. For details on register addresses and register states in each
processing state, see section 24, List of Registers.
• Bypass register (SDBPR)
• Instruction register (SDIR)
• Boundary scan register (SDBSR)
• ID register (SDID)
23.3.1 Bypass Register (SDBPR)
SDBPR is a 1-bit register that cannot be accessed by the CPU. When SDIR is set to the bypass
mode, SDBPR is connected between UDI pins TDI and TDO. The initial value is undefined but
SDBPR is initialized when the TAP enters the Capture-DR state.
23.3.2 Instruction Register (SDIR)
SDIR is a 16-bit read-only register. The register is in JTAG IDCODE in its initial state. It is
initialized by TRST assertion or in the TAP test-logic-reset state, and can be written to by the UDI
irrespective of the CPU mode. Operation is not guaranteed if a reserved command is set in this
register.
Rev. 2.00, 09/03, page 569 of 690