HD6417705F133V Datasheet, PDF (230/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Table 7.5 16-Bit External Device/Big Endian Access and Data Alignment
Operation
Data Bus
WE3 D31 to D23 to D15 to D7 to D0 ,
D24 D16 D8
DQMUU
Byte access at 0   Data 7 to 

Data 0
Byte access at 1   
Data 7 to 
Data 0
Byte access at 2   Data 7 to 

Data 0
Byte access at 3   
Data 7 to 
Data 0
Word access at 0   Data 15 Data 7 to 
to Data 8 Data 0
Word access at 2   Data 15 Data 7 to 
to Data 8 Data 0
Longword 1st
  Data 31 Data 23 
access time at 0
to Data to Data
at 0
24
16
2nd   Data 15 Data 7 to 
time at 2
to Data 8 Data 0
Strobe Signals
WE2, WE1,
DQMUL DQMLU

Assert



Assert



Assert

Assert

Assert

Assert
WE0,
DQMLL

Assert

Assert
Assert
Assert
Assert
Assert
Rev. 2.00, 09/03, page 182 of 690