HD6417705F133V Datasheet, PDF (342/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Table 11.1 States of Power-Down Modes
State
Mode
Transition
Conditions
On-Chip
CPU
Peripheral
CPG CPU Register Modules Pins
External Canceling
Memory Condition
Sleep mode Execute SLEEP Run Halt Held
Run
instruction with
STBY bit cleared
to 0 in STBCR
*³
Refresh 1. Interrupt
2. Reset
Software
standby
mode
Module
standby
function
Execute SLEEP Halt Halt Held
instruction with
STBY bit set to 1
in STBCR
Set MSTP bit of Run Run Held
STBCR, STBCR2,
and STBCR3 to 1
Halt^*1
*³
Specified ^*2
module
halts
Self-
1. Interrupt
refresh _{2. Reset}
Refresh 1. Clear MSTP
bit to 0
2. Power-on
reset
Hardware Drive CA pin low Halt Halt Held
Halt^*1
*⁴

standby
mode
Power-on reset
Notes: 1. The RTC still runs if the START bit in RCR2 is set to 1 (see section 15, Realtime Clock
(RTC)).
2. Depends on the on-chip peripheral module.
3. Refer to table A.1, in Appendix.
4. Hi-Z except EXTAL, XTAL, EXTAL2, XTAL2, EXTAL_USB, XTAL_USB, STATUS1, and
STATUS0.
Rev. 2.00, 09/03, page 294 of 690