HD6417705F133V Datasheet, PDF (107/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Table 2.11 System Control Instructions
Instruction
CLRM
AC
CLRS
CLRT
LDC Rm,SR
LDC Rm,GBR
LDC Rm,VBR
LDC Rm,SSR
LDC Rm,SPC
LDC Rm,R0_BANK
LDC Rm,R1_BANK
LDC Rm,R2_BANK
LDC Rm,R3_BANK
LDC Rm,R4_BANK
LDC Rm,R5_BANK
LDC Rm,R6_BANK
LDC Rm,R7_BANK
LDC.L @Rm+,SR
LDC.L @Rm+,GBR
LDC.L @Rm+,VBR
LDC.L @Rm+,SSR
LDC.L @Rm+,SPC
LDC.L @Rm+,
R0_BANK
LDC.L @Rm+,
R1_BANK
LDC.L @Rm+,
R2_BANK
LDC.L @Rm+,
R3_BANK
LDC.L @Rm+,
R4_BANK
LDC.L @Rm+,
R5_BANK
Instruction Code Operation
0000000000101000 0→MACH,MACL
0000000001001000 0→S
0000000000001000 0→T
0100mmmm00001110 Rm→SR
0100mmmm00011110 Rm→GBR
0100mmmm00101110 Rm→VBR
0100mmmm00111110 Rm→SSR
0100mmmm01001110 Rm→SPC
0100mmmm10001110 Rm→R0_BANK
0100mmmm10011110 Rm→R1_BANK
0100mmmm10101110 Rm→R2_BANK
0100mmmm10111110 Rm→R3_BANK
0100mmmm11001110 Rm→R4_BANK
0100mmmm11011110 Rm→R5_BANK
0100mmmm11101110 Rm→R6_BANK
0100mmmm11111110 Rm→R7_BANK
0100mmmm00000111 (Rm)→SR, Rm+4→Rm
0100mmmm00010111 (Rm)→GBR, Rm+4→Rm
0100mmmm00100111 (Rm)→VBR, Rm+4→Rm
0100mmmm00110111 (Rm)→SSR, Rm+4→Rm
0100mmmm01000111 (Rm)→SPC, Rm+4→Rm
0100mmmm10000111 (Rm)→R0_BANK, Rm+4→Rm
0100mmmm10010111 (Rm)→R1_BANK, Rm+4→Rm
0100mmmm10100111 (Rm)→R2_BANK, Rm+4→Rm
0100mmmm10110111 (Rm)→R3_BANK, Rm+4→Rm
0100mmmm11000111 (Rm)→R4_BANK, Rm+4→Rm
0100mmmm11010111 (Rm)→R5_BANK, Rm+4→Rm
Privileged
Mode
Cycles T Bit
–
1
–
–
1
–
–
1
0
√
6
LSB
–
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
8
LSB
–
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
√
4
–
Rev. 2.00, 09/03, page 59 of 690