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HD6417705F133V Datasheet, PDF (63/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series
Pin No.
FP- TBP-
208C 208A Pin Name
I/O
Description
180 A10 VssQ
181 D9 CTS2/SCPT5

I / I/O
I/O power supply (0 V)
SCIF2 transmit clear / SC port
182 B9 Vss

I/O power supply (0 V)
183 A9 RESETM
I
Manual reset request
184 C9
185 A8
186 B8
187 C8
188 D8
Vcc
IRQ0/IRL0/PTH0
IRQ1/IRL1/PTH1
IRQ2/IRL2/PTH2
IRQ3/IRL3/PTH3

I / I / I/O
I / I / I/O
I / I / I/O
I / I / I/O
Internal power supply (1.5 V)
External interrupt request / input/output port H
External interrupt request / input/output port H
External interrupt request / input/output port H
External interrupt request / input/output port H
189 A7 IRQ4/PTH4
I / I/O
External interrupt request / input/output port H
190 B7 IRQ5/PTE2
I / I/O
External interrupt request / input/output port E
191 C7 AUDCK/PTG4
O / I/O
AUD clock / input/output port G
192 D7 NMI
I
Nonmaskable interrupt request
193 A6 DREQ0/PTH5
I / I/O
DMA request / input/output port H
194 B6
195 C6
DREQ1/PTH6
RESETP*6
I / I/O
I
DMA request / input/output port H
Power-on reset request
196 D6 CA
I
Hardware standby request
197 A5 MD3
I
Area 0 bus width setting
198 B5 MD4
I
Area 0 bus width setting
199 C5 AVss

Analog power supply (0 V)
200 D5 AN0/PTL0
I/I
A/D converter input / input port L
201 A4 AN1/PTL1
I/I
A/D converter input / input port L
202 B4 AN2/PTL2
I/I
A/D converter input / input port L
203 C4 AN3/PTL3
I/I
A/D converter input / input port L
204 A3 AVcc

Analog power supply (3.3 V)
205 B3 VssQ

I/O power supply (0 V)
206 D4 EXTAL_USB
I
USB clock
207 A2 XTAL_USB
O
USB clock
208 B2 VccQ

I/O power supply (3.3 V)
Notes: The unused pins should be handled according to table A.1, I/O Port States in Each
Processing State, in Appendix.
1. The TRST pin must be driven low for a specified period when power supply is turned on
regardless of whether the UDI function is used or not. As the same as the RESETP pin,
the TRST pin should be driven low at the power-on set state and driven high after the
power-on reset state is released.
Rev. 2.00, 09/03, page 15 of 690