HD6417705F133V Datasheet, PDF (386/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

14.3.3 Timer I/O Control Registers (TIOR)
TIOR are 16-bit registers that control the TO pin.
TIOR register settings should be made only when TCNT operation is stopped.
Care is required since TIOR is affected by the TMDR setting.
Initial
Bit
Bit Name Value
15 to 3 
0
2
IOA2
0
1
IOA1
0
0
IOA0
0
R/W
R
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0 and cannot be modified.
I/O Control
Bits IOA2 to IOA0 specify the functions of TGRA and the TO
pin. For details, refer to table 14.5.
Table 14.5 IOA2 to IOA0
Bit 2 Bit 1 Bit 0
Channel IOA2 IOA1 IOA0 Description
0 to 3 0
0
0
Always 0 output
1
Initial output is 0 0 output at TGRA compare match^*
1
0
output for TO pin _{1 output at TGRA compare match}
1
Toggle output at TGRA compare match^*
1
0
0
Always 1 output
1
Initial output is 1 0 output at TGRA compare match
1
0
output for TO pin _{1 output at TGRA compare match*}
1
Toggle output at TGRA compare match^*
Note: * This setting is invalid in PWM mode.
Rev. 2.00, 09/03, page 338 of 690