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HD6417705F133V Datasheet, PDF (234/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series
Table 7.9 8-Bit External Device/Little Endian Access and Data Alignment
Operation
Data Bus
Strobe Signals
WE3 D31 to D23 to D15 to D7 to D0
,
WE2,
WE1,
WE0,
D24 D16 D8
DQMUU DQMUL DQMLU DQMLL
Byte access at 0    Data 7 to 


Assert
Data 0
Byte access at 1    Data 7 to 


Assert
Data 0
Byte access at 2    Data 7 to 


Assert
Data 0
Byte access at 3    Data 7 to 


Assert
Data 0
Word
1st time    Data 7 to 


Assert
access at 0 at 0
Data 0
2nd time    Data 15 to 


Assert
at 1
Data 8
Word
1st time    Data 7 to 


Assert
access at 2 at 2
Data 0
2nd time    Data 15 to 


Assert
at 3
Data 8
Longword 1st time    Data 7 to 


Assert
access at 0 at 0
Data 0
2nd time    Data 15 to 


Assert
at 1
Data 8
3rd time    Data 23 to 


Assert
at 2
Data 16
4th time    Data 31 to 


Assert
at 3
Data 24
Rev. 2.00, 09/03, page 186 of 690