HD6417705F133V Datasheet, PDF (582/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

21.4.3 Scan Mode
Scan mode should be selected when performing A/D conversions of analog inputs on one or more
specified channels. Scan mode is useful for monitoring analog inputs.
1. When the ADST bit is set to 1 by software, A/D conversion starts with the smaller number of
the analog input channel in the group (for instance, AN0, and AN1 to AN3).
2. When conversion of each channel ends, the conversion results are transmitted to the A/D data
register that corresponds to the channel.
3. When conversion of all selected channels ends, the ADF bit of ADCSR is set to 1. If the
ADIE bit is also set to 1, an ADI interrupt is requested at this time. A/D conversion then starts
with the smaller number of the analog input channel.
4. The ADST bit is not automatically cleared to 0. When the ADST bit is set to 1, steps 2 and 3
above are repeated. When the ADST bit is cleared to 0, the conversion is halted and the A/D
converter becomes idle.
To clear the ADF flag to 0, first read ADF, then write 0 to ADF.
21.4.4 Input Sampling and A/D Conversion Time
The A/D converter has a built-in sample-and-hold circuit. The A/D converter samples the analog
input at an A/D conversion start delay time t_D after the ADST bit is set to 1, then starts conversion.
Figure 21.2 shows the A/D conversion timing. Table 21.3 indicates the A/D conversion time.
As indicated in figure 21.2, the A/D conversion time (t_CONV) includes t_D and the input sampling
time (t_SPL). The length of t_D varies depending on the timing of the write access to ADCSR. The
total conversion time therefore varies within the ranges indicated in table 21.3.
In multi mode and scan mode, the values given in table 21.3 apply to the first conversion. In the
second and subsequent conversions, the values given in table 21.4 apply to the first conversion.
Rev. 2.00, 09/03, page 534 of 690