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HD6417705F133V Datasheet, PDF (381/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series | |||
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⢠Timer counter_1 (TCNT_1)
⢠Timer general register A_1 (TGRA_1)
⢠Timer general register B_1 (TGRB_1)
⢠Timer general register C_1 (TGRC_1)
⢠Timer general register D_1 (TGRD_1)
3. Channel 2
⢠Timer control register_2 (TCR_2)
⢠Timer mode register_2 (TMDR_2)
⢠Timer I/O control register_2 (TIOR_2)
⢠Timer interrupt enable register_2 (TIER_2)
⢠Timer status register 2 (TSR_2)
⢠Timer counter_2 (TCNT_2)
⢠Timer general register A_2 (TGRA_2)
⢠Timer general register B_2 (TGRB_2)
⢠Timer general register C_2 (TGRC_2)
⢠Timer general register D_2 (TGRD_2)
4. Channel 3
⢠Timer control register_3 (TCR_3)
⢠Timer mode register_3 (TMDR_3)
⢠Timer I/O control register_3 (TIOR_3)
⢠Timer interrupt enable register_3 (TIER_3)
⢠Timer status register_3 (TSR_3)
⢠Timer counter_3 (TCNT_3)
⢠Timer general register A_3 (TGRA_3)
⢠Timer general register B_3 (TGRB_3)
⢠Timer general register C_3 (TGRC_3)
⢠Timer general register D_3 (TGRD_3)
5. Common
⢠Timer start register (TSTR)
Rev. 2.00, 09/03, page 333 of 690
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