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HD6417705F133V Datasheet, PDF (231/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series
Table 7.6 8-Bit External Device/Big Endian Access and Data Alignment
Operation
Data Bus
WE3 D31 to D23 to D15 to D7 to D0
,
D24 D16 D8
DQMUU
Byte access at 0
   Data 7 to 
Data 0
Byte access at 1
   Data 7 to 
Data 0
Byte access at 2
   Data 7 to 
Data 0
Byte access at 3
   Data 7 to 
Data 0
Word
1st time    Data 15 
access at 0 at 0
to Data 8
2nd time    Data 7 to 
at 1
Data 0
Word
1st time    Data 15 
access at 2 at 2
to Data 8
2nd time    Data 7 to 
at 3
Data 0
Longword 1st time    Data 31 
access at 0 at 0
to Data
24
2nd time    Data 23 
at 1
to Data
16
3rd time    Data 15 
at 2
to Data 8
4th time    Data 7 to 
at 3
Data 0
Strobe Signals
WE2, WE1,
DQMUL DQMLU
























WE0,
DQMLL
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Rev. 2.00, 09/03, page 183 of 690