HD6417705F133V Datasheet, PDF (430/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Bit
Initial
Bit
Name Value R/W Description
15 to 11 
0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
10
SRC2 0
R/W Sampling Control
9
SRC1 0
R/W Select the sampling rate in asynchronous mode. This
8
SRC0 0
R/W ^{setting is valid only in asynchronous mode.}
000: Sampling rate 1/16
001: Sampling rate 1/5
010: Sampling rate 1/11
011: Sampling rate 1/13
100: Sampling rate 1/29
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
7
C/A
0
R/W Communication Mode
Selects whether the SCI operates in the asynchronous
or clock synchronous mode.
0: Asynchronous mode
1: Clock synchronous mode
6
CHR 0
R/W Character Length
Selects seven or eight bits as the data length.
This setting is only valid in asynchronous mode. In
clock synchronous mode, the data length is always
eight bits, regardless of the CHR setting.
0: 8-bit data
1: 7-bit data^*
Note: * When the 7-bit data is selected, the MSB bit (bit
7) in the transmit FIFO data register (SCFTDR)
is not transmitted.
Rev. 2.00, 09/03, page 382 of 690