HD6417705F133V Datasheet, PDF (507/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

4. Status Stage (Control-In)
USB function
OUT token reception
Application
0-byte reception from host
ACK
Set EP0o reception
complete flag
(IFR0.EP0o TS = 1)
Interrupt request
Clear EP0o reception
complete flag
(IFR0.EP0o TS = 0)
End of control transfer
Write 1 to EP0o read
complete bit
(TRG.EP0o RDFN = 1)
End of control transfer
Figure 18.8 Status Stage (Control-In) Operation
The control-in status stage starts with an OUT token from the host. The application receives 0-byte
data from the host, and ends control transfer.
Rev. 2.00, 09/03, page 459 of 690