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HD6417705F133V Datasheet, PDF (391/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series
14.4.2 Basic Functions
Counter Operation: When one of bits CST0 to CST3 is set to 1 in TSTR, the TCNT counter for
the corresponding channel starts counting. TCNT can operate as a free-running counter, periodic
counter, and so on.
• Example of count operation setting procedure
Figure 14.2 shows an example of the count operation setting procedure.
Operation selection
Select counter clock
[1]
Periodic counter
Select counter clearing source [2]
Select output compare register [3]
Set period
[4]
Set external pin function
[5]
Start count
[6]
<Periodic counter>
Free-running counter
Set external pin function
Start count
<Free-running counter>
[1] Select the counter clock
with bits TPSC2 to
TPSC0 in TCR. At the
same time, select the
input clock edge with bits
CKEG1 and CKEG0 in
TCR.
[2] For periodic counter
operation, select the
TGRA to be used as the
TCNT clearing source
with bits CCLR2 to
CCLR0 in TCR.
[3] Designate the output
compare register by
means of TIOR.
[4] Set the periodic counter
cycle in the TGRA.
[5] Set the external pin
[5]
function in pin function
controller (PFC).
[6] Set the CST bit in TSTR
[6]
to 1 to start the count
operation.
Figure 14.2 Example of Counter Operation Setting Procedure
Rev. 2.00, 09/03, page 343 of 690