HD6417705F133V Datasheet, PDF (568/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Bit
Initial
Bit Name Value R/W
7 to 0 PK7DT 0
R/W
to
PK0DT
Description
Table 20.10 shows the function of PKDR.
Table 20.10 Port K Data Register (PKDR) Read/Write Operations
PKCR State
PKnMD1 PKnMD0 Pin State
Read
0
0
Other function PKDR value
1
1
0
1
Note: n = 0 to 7
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
PKDR value
Pin state
Pin state
Write
Data can be written to PKDR but no effect
on pin state.
Written data is output from the pin.
Data can be written to PKDR but no effect
on pin state.
Data can be written to PKDR but no effect
on pin state.
20.11 Port L
Port L is a 4-bit input port with the pin configuration shown in figure 20.11.
Port L
PTL3 (input)/AN3 (input)
PTL2 (input)/AN2 (input)
PTL1 (input)/AN1 (input)
PTL0 (input)/AN0 (input)
Figure 20.11 Port L
20.11.1 Register Description
Port L has the following register. For details on the register address and access size, see section
24, List of Registers.
• Port L data register (PLDR)
Rev. 2.00, 09/03, page 520 of 690