HD6417705F133V Datasheet, PDF (715/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

CKIO
A25 to A0
Tp Tpw Trr Trc
PALL
t_AD3
REF
t_AD3
A12/A11^*1
CSn
RD/WR
RASU/L
CASU/L
t_CSD2 t_CSD2 t_CSD2 t_CSD2
t_RWD2 t_RWD2
t_RASD2 t_RASD2 t_{RASD2 tRASD2}
t_CASD2 t_CASD2
DQMxx
D31 to D0
Trc Trr Trc
REF
t_CSD2 t_CSD2
t_RASD2 t_RASD2
t_CASD2 t_CASD2
(Hi-Z)
Trc Tmw Tde
MRS
t_AD3
t_AD3
t_AD3
t_CSD2 t_CSD2
t_RWD2 t_RWD2 ^tRWD2
t_RASD2 t_RASD2
t_CASD2 t_CASD2
BS
CKE
DACKn^*2
Notes: 1. Address pin to be connected to A10 of SDRAM.
2. DACKn is a waveform when active-low is specified.
Figure 25.42 Synchronous DRAM Mode Register Write Timing
(TRP = 2 Cycle, Low-Frequency Mode)
Rev. 2.00, 09/03, page 667 of 690