HD6417705F133V Datasheet, PDF (131/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

3.4.4 Avoiding Synonym Problems
When a 1- or 4-kbyte page is recorded in a TLB entry, a synonym problem may arise. If a number
of virtual addresses are mapped onto a single physical address, the same physical address data will
be recorded in a number of cache entries, and it will not be possible to guarantee data congruity.
The reason that this problem occurs is explained below with reference to figure 3.12.
The relationship between bit n of the virtual address and cache size is shown in the following
table. Note that no synonym problems occur in 4-kbyte page when the cache size is 16 kbytes.
Cache Size
16 kbytes
32 kbytes
Bit n in Virtual Address
11
12
To achieve high-speed operation of this LSI’s cache, an index number is created using virtual
address bits 12 to 4. When a 1-kbyte page is used, virtual address bits 12 to 10 is subject to address
translation and when a 4-kbyte page is used, a virtual address bit 12 is subject to address
translation. Therefore, the physical address bits 12 to 10 may not be the same as the virtual address
bits 12 to 10.
For example, assume that, with 1-kbyte page TLB entries, TLB entries for which the following
translation has been performed are recorded in two TLBs:
Virtual address 1 H'00000000 → physical address H'00000C00
Virtual address 2 H'00000C00 → physical address H'00000C00
Virtual address 1 is recorded in cache entry H'000, and virtual address 2 in cache entry H'0C0.
Since two virtual addresses are recorded in different cache entries despite the fact that the physical
addresses are the same, memory inconsistency will occur as soon as a write is performed to either
virtual address.
Consequently, the following restrictions apply to the recording of address translation information
in TLB entries.
1. When address translation information whereby a number of 1-kbyte page TLB entries are
translated into the same physical address is recorded in the TLB, ensure that the VPN bits 12 to
10 are the same.
2. When address translation information whereby a number of 4-kbyte page TLB entries are
translated into the same physical address is recorded in the TLB, ensure that the VPN bit 12 is
the same.
3. Do not use the same physical addresses for address translation information of different page
sizes.
Rev. 2.00, 09/03, page 83 of 690