HD6417705F133V Datasheet, PDF (680/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Item
PLL synchronization settling time 1
PLL synchronization settling time 2
Interrupt determination time
(RTC used and standby mode)
Symbol
tPLL1
tPLL2
tIRLSTB
Min
100
100
100
Max Unit Figure
— µs 25.9, 25.10
— µs 25.11
— µs 25.10
t_EXcyc
EXTAL*
(input)
1/2 V_CCQ
t_EXH
V_IH
V_IH
t_EXL
V_IL
V_IL
t_EXf
V_IH
1/2 V_CCQ
t_EXr
Note: * The clock input from the EXTAL pin.
Figure 25.2 EXTAL Clock Input Timing
CKIO
(input)
1/2 V_CCQ
t_CKIH
t_CKICYC
t_CKIL
V_IH
V_IH
V_IL
V_IL
t_CKIF
V_IH
1/2 V_CCQ
t_CKIR
Figure 25.3 CKIO Clock Input Timing
CKIO
(output)
1/2 V_CCQ
t_cyc
t_CKOH
t_CKOL
V_OH
V_OH
V_OL
t_CKOf
V_OH
V_OL
1/2 V_CCQ
t_CKOr
Figure 25.4 CKIO Clock Output Timing
Rev. 2.00, 09/03, page 632 of 690