HD6417705F133V Datasheet, PDF (579/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Bit
Initial
Bit
Name Value R/W
14
ADIE 0
R/W
13
ADST 0
R/W
12
DMASL 0
R/W
11 to 8 —
0
R
Description
A/D Interrupt Enable
Enables or disables the interrupt (ADI) requested by ADF.
Set the ADIE bit while the ADST bit is 0.
0: Interrupt (ADI) requested by ADF is disabled
1: Interrupt (ADI) requested by ADF is enabled
A/D Start
Starts or stops A/D conversion. The ADST bit remains set to
1 during A/D conversion.
0: A/D conversion is stopped.
1: Single mode:
A/D conversion starts; ADST is automatically cleared to 0
when conversion ends on selected channels.
Multi mode:
A/D conversion starts; when conversion is completed
cycling through the selected channels, ADST is
automatically cleared.
Scan mode:
A/D conversion starts and continues, A/D conversion is
continuously performed until ADST is cleared to 0 by
software, by a reset, or by a transition to standby mode.
DMAC Select
Selects an interrupt due to ADF or activation of the DMAC.
Set the DMASL bit while the ADST bit is 0.
0: An interrupt by ADF is selected.
1: Activation of the DMAC by ADF is selected.
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 2.00, 09/03, page 531 of 690