HD6417705F133V Datasheet, PDF (720/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

SCK
TxD
(data trans-
mission)
RxD
(data
reception)
RTS
CTS
t_Scyc
t_TXD
t_RTSD
t_RXS t_RXH
t_CTSS t_CTSH
Figure 25.50 SCIF Input/Output Timing in Clock Synchronous Mode
25.3.12 USB Module Signal Timing
Table 25.14 USB Module Clock Timing
(Conditions: VCCQ = VCC-RTC = VCC-USB = 3.0 to 3.6 V, VCC = VCC-PLL1 = VCC-PLL2 = 1.4 to
1.6 V, AVCC = 3.0 to 3.6 V, VSSQ = VSS = VSS-RTC = VSS-USB = VSS-PLL1 = VSS-PLL2 =
AVSS = 0 V, Ta = –20 to 75°C)
Item
Symbol
Min
Max
Unit
Figure
Frequency (48 MHz)^*
Clock rise time^*
Clock fall time^*
Duty (tHIGH/tLOW)^*
tFREQ
tR48
tF48
tDUTY
47.9
48.1
MHz
25.51
—
4
ns
—
4
ns
90
110
%
Oscillation settling time
tUOSC
10
—
ms
25.52
Note: * When the USB is operated by supplying a clock to the EXTAL_USB pin from off-chip, the
supplied clock must satisfy the above clock specifications.
EXTAL_USB
t_FREQ
t_HIGH
t_LOW
90%
10%
t_R48
t_F48
Figure 25.51 USB Clock Timing
Rev. 2.00, 09/03, page 672 of 690