HD6417705F133V Datasheet, PDF (436/741 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Bit
Initial
Bit
Name Value R/W Description
1
CKE1 0
R/W Clock Enable
0
CKE0 0
R/W Select the SCIF clock source. The CKE1 and CKE0 bits
must be set before determining the SCIF operating mode
with SCSMR.
00: Internal clock/SCK pin functions as input pin (input
signal ignored)
01: Internal clock/SCK pin functions as serial clock
output^*1
10: External clock/SCK pin functions as clock input^*2
11: External clock/SCK pin functions as clock input^*2
When data is sampled by the on-chip baud rate
generator, set bits CKE1 and CKE0 to B'00 (internal
clock/SCK pin functions as input pin (input signal
ignored)).
When using the SCK pin as a port, set bits CKE1 and
CKE0 to B’00.
Notes: 1. In synchronous mode, a clock with a
frequency equal to the bit rate is output.
2. In asynchronous mode, a clock with a
sampling rate should be input. For example,
when the sampling rate is 1/16, a clock with a
frequency of 8 times the bit rate should be
input. When an external clock is not input, set
bits CKE1 and CKE0 to B'00 or B'01.
Rev. 2.00, 09/03, page 388 of 690