SH7144 Datasheet, PDF (78/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

Branch Instructions
Instruction
Instruction Code
Operation
Execution
States T Bit
BF label 10001011dddddddd If T = 0, disp × 2 + PC → PC; if T = 3/1*
—
1, nop
BF/S label 10001111dddddddd Delayed branch, if T = 0, disp × 2 + 2/1*
—
PC → PC; if T = 1, nop
BT label 10001001dddddddd If T = 1, disp × 2 + PC → PC; if T = 3/1*
—
0, nop
BT/S label 10001101dddddddd Delayed branch, if T = 1, disp × 2 + 2/1*
—
PC → PC; if T = 0, nop
BRA label 1010dddddddddddd Delayed branch, disp × 2 + PC → 2
—
PC
BRAF Rm
0000mmmm00100011 Delayed branch, Rm + PC → PC 2
—
BSR label 1011dddddddddddd Delayed branch, PC → PR, disp × 2 2
—
+ PC → PC
BSRF Rm
0000mmmm00000011 Delayed branch, PC → PR,
2
—
Rm + PC → PC
JMP @Rm
0100mmmm00101011 Delayed branch, Rm → PC
2
—
JSR @Rm
0100mmmm00001011 Delayed branch, PC → PR, Rm → 2
—
PC
RTS
0000000000001011 Delayed branch, PR → PC
2
—
Note: * One state when the program does not branch.
Rev. 2.0, 09/02, page 38 of 732