SH7144 Datasheet, PDF (664/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

Bit Bit Name Initial Value R/W
6
HIZ
0
R/W
5
—
0
R
4 to 2 —
All 1
R
1
IRQEH
1
R/W
0
IRQEL
1
R/W
Description
Port High-Impedance
In software standby mode, this bit selects whether the
pin state of the I/O port is retained or changed to
high-impedance.
0: In software standby mode, the pin state is
retained.
1: In software standby mode, the pin state is
changed to high-impedance.
The HIZ bit cannot be set to 1 when the TME bit in
TCSR of the WDT is set to 1.
When changing the pin state of the I/O port to high-
impedance, clear the TME bit to 0, then set the HIZ
bit to 1.
Reserved
This bit is always read as 0, and should always be
written with 0.
Reserved
These bits are always read as 1, and should always
be written with 1.
IRQ7 to IRQ4 Enable
IRQ7 to IRQ4 interrupts are enabled to clear software
standby mode.
0: Enable to clear the software standby mode
1: Disable to clear the software standby mode
IRQ3 to IRQ0 Enable
IRQ3 to IRQ0 interrupts are enabled to clear software
standby mode.
0: Enable to clear the software standby mode
1: Disable to clear the software standby mode
Rev. 2.0, 09/02, page 624 of 732