SH7144 Datasheet, PDF (209/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

External address bus
This LSI
DMAC
External data bus
External
memory
External device
with DACK
DACK
: Data flow
Figure 10.4 Data Flow in Single Address Mode
Two types of transfers are possible in the single address mode: (a) transfers between external
devices with DACK and memory-mapped external devices, and (b) transfers between external
devices with DACK and external memory. The only transfer requests for either of these is the
external request (DREQ). Figure 10.5 shows the DMA transfer timing for the single address mode.
CK
A21–A0
Address output to external memory space
D15–D0
DACK
Data that is output from the external
device with DACK
signal to external memory space
DACK signal to external devices with
DACK (active low)
a. External device with DACK to external memory space
CK
A21–A0
Address output to external memory space
D15–D0
Data that is output from external memory space
signal to external memory space
DACK
DACK signal to external device with DACK
(active low)
b. External memory space to external device with DACK
Figure 10.5 Example of DMA Transfer Timing in the Single Address Mode
Rev. 2.0, 09/02, page 169 of 732